1. (TCO 1) Determine the correct Boolean expression for the gate below 2. (TCO 1) Determine the correct Boolean expression for the gate below. 3. (TCO 1) Determine the correct Boolean expression for the gate below. 4. (TCO 1) Determine the correct Boolean expression for the gate below. 5. (TCO 1) Determine the correct Boolean expression for the gate below. 6. (TCO 1) Determine the correct VHDL assignment statement for the gate below. 7. (TCO 1) Determine the correct VHDL assignment statement for the gate below. 8. (TCO 1) Determine the correct VHDL assignment statement for the gate below. 9. (TCO 1) Determine the correct VHDL assignment statement for the gate below. 10. (TCO 1) Determine the correct VHDL assignment statement for the gate below. 11. (TCO 2) Determine logic level (HIGH/LOW) on input A at time period T1 and T2 in order for the output of the given logic gate to be as follows. 12. (TCO 2) Determine logic level (HIGH/LOW) on input A at time period T1 and T2 in order for the output of the given logic gate to be as follows. 17. (TCO 2) What is the analog specification VOH? 18. (TCO 2) A TTL device has the following specifications. Maximum VIL = .8 V, minimum VIH = 2 V An input is measured to be 1.2 V. How will the device interpret that voltage? 19. (TCO 2) A CMOS device has the following specifications. Maximum VIL = 1.67 V, minimum VIH = 3.33 V An input is measured to be 2 V. How will the device interpret that voltage? (Points : 1) 20. (TCO 2) Determine the value for minimum VOH of the standard 7400 TTL Series. (Points : 1) 21. (TCO 2) Determine the value for maximum VIL of the standard 4000B Series CMOS. (Points : 1) 22. (TCO 1) OUTPUT is equal to CLOCK when ENABLE is _____. 23. (TCO 1) OUTPUT is equal to when ENABLE is
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