{"id":136312,"date":"2018-02-20T23:50:30","date_gmt":"2018-02-20T23:50:30","guid":{"rendered":"https:\/\/writemyessayfree.com\/the-market-reaction-to-corporate-governance-regulation"},"modified":"2017-08-16T07:27:50","modified_gmt":"2017-08-16T07:27:50","slug":"the-market-reaction-to-corporate-governance-regulation","status":"publish","type":"post","link":"https:\/\/www.benedictsol.com\/blogs\/the-market-reaction-to-corporate-governance-regulation\/","title":{"rendered":"The Market Reaction to Corporate Governance Regulation"},"content":{"rendered":"<p> Joon, age 51, is an unmarried, cash basis, calendar year taxpayer. Joon has one 9-year-old qualifying child who lives with him full-time and is claimed on Form 1040. Joon has the following income and deductions for 2016:<\/p>\n<p>RECEIPTS FOR YEAR\/Deductions<br \/> Salaries and wages from local school district $78,000<br \/> Interest from Friendly Bank 1,235<br \/> Dividends from Tandem Diabetic Corporation (a publicly traded <br \/> U.S. corporation) 36<br \/> Allowable itemized deductions 6,970<\/p>\n<p>RENTAL OPERATIONS<br \/> Rental income 14,400<br \/> Interest expense 7,800<br \/> Property taxes 1,450<br \/> Insurance 1,260<br \/> Depreciation?Building 2,895<br \/> Depreciation?Appliances 941<\/p>\n<p>SALE OF RENTAL RESIDENCE<br \/> Sales price (October 26, 2016) 210,600<br \/> Cost (October 18, 2010)?$40,000 assigned to land 119,600<br \/> Depreciation allowed (Straight line MACRS) 17,367<br \/> Selling commission 7,440<br \/> Purchase costs (recording, other legal) 2,760<\/p>\n<p>SALE OF APPLIANCES WITH RESIDENCE<br \/> Sales price (October 26, 2016) 6,600<br \/> Cost (September 25, 2014) 9,800<br \/> Depreciation allowed (Straight line MACRS) 6,037<\/p>\n<p>Prepare the following forms for Joon for 2016:<\/p>\n<p>Form 1040<br \/> Schedule D (Required)?Worksheet Not Required?You may calculate the<br \/> tax without completing the worksheet. See October 26 Solutions for an<br \/> example.<br \/> Schedule E<br \/> Form 4562<br \/> Form 4797<\/p>\n<p>Provide any information that is not stated.<\/p>\n<p>Accountancy 503?Fall 2016 Tax Return 3b?5 points; Due December 7<\/p>\n<p>Brianna, age 29, is an unmarried, cash basis, calendar year taxpayer. Aileen has no dependents. Aileen has the following income and deductions for 2016:<\/p>\n<p>RECEIPTS FOR YEAR\/Deductions<br \/> Salaries and wages from local school district $48,000<br \/> Interest from Friendly Bank 1,235<br \/> Dividends from Tandem Diabetic Corporation (a publicly traded <br \/> U.S. corporation) 36<br \/> Allowable itemized deductions 6,940<\/p>\n<p>BUSINESS OPERATIONS?PROFESSIONAL SERVICES<br \/> Fee income collected 34,400<br \/> Interest expense 4,800<br \/> Office supplies 1,450<br \/> Insurance 1,260<br \/> Rental expense 12,895<br \/> Transportation 2,300<br \/> Continuing Education 975<br \/> Purchase of computer and peripherals 1,880<\/p>\n<p> Prepare the following forms for Aileen for 2016:<\/p>\n<p>Schedule C<br \/> Schedule SE<\/p>\n<p>Provide any information that is not stated.<\/p>\n<p>1.<\/p>\n<p>Choose a company about 15 pager Suggested Project Outline 1. Executive Summary 2. Firm, Industry, and Environment (not to exceed 2 pages) 1. Summary description the firm including a brief description of the key product or service, the relevant market, and analysis of demand including the principle factors that influence demand, and the implications for revenue. 2. Brief description of the principal inputs, production processes, indicating any significant changes in technology and analysis of trends in productivity. 3. Summary of the behavior of costs, short-run and long run, indicating the principal factors that influence costs and their impacts as indicated by cost trends. 4. Summary of the competitive environment, analysis of the key measures through which firms compete (pricing, quality, brand, innovation, etc.) and discussion of potential changes in the level of competition. 3. Company Performance and Managerial Effectiveness 1. Through-time (trend) analysis of the firm?s performance (using the Dupont framework as an organizing template for your discussion) 2. Cross-sectional analysis and comparison of the firm with benchmarks: industry competitor and industry benchmarks 3. Discuss the effect of the firm?s accounting choices on the financial statements 4. Future Prospects: 1. Integrative assessment of current company performance, focusing on principal sources of competitive advantage, investment potential, and credit-worthiness. 2. Integrative overall outlook for future performance 5. Appendix 6. Footnotes 7. Bibliography1.<\/p>\n<p>2.<\/p>\n<p>HRM 300: Equal Employment Opportunity and Employee Rights Review.<\/p>\n<p>For each selected law or issue, locate a present-day court case that has challenged your selected law or issue A): Equal Employment Opportunity Act of 1972, and Family and Medical Leave Act of 1993. B): Whistle-Blowing. There are a total of three issues to address in the paper Please be original, include APA format, and cite references.<\/p>\n<p>3.<br \/> coding using MPLAB<\/p>\n<p> 4 Lab 4 ? Timer0 module<\/p>\n<p> 5,This laboratory practical will introduce you to the Timer0 module which is one of three timer\/counter<br \/> peripherals located on the PIC16F877A MCU. Timer\/counter modules allow the creation of precise<br \/> and deterministic timing intervals which is essential in many applications e.g. frequency<br \/> generation\/measurement, timekeeping, control systems, communications.??This laboratory practical<br \/> will focus on the proper configuration and usage of the Timer0 module in timer mode only.<br \/> 4.2 Learning Outcomes<br \/> ? Understand the structure of the Timer0 module on the PIC16F877A<br \/> ? Be able to configure the Timer0 module using the appropriate special function registers<br \/> ? Be able to develop projects to utilise the Timer0 module in a range of applications.<br \/> 4.3 Background<br \/> 4.3.1 Counter\/Timers<br \/> The only practical difference between a counter and a timer is the nature of the source. A counter<br \/> simply increments a stored ?count? value when a logic state change (either a rising or falling edge) is<br \/> received at its input. To operate a counter as a timer, a synchronous pulse train (clock) of a known<br \/> frequency is applied to the input. Figure 4-1 shows a generic representation of a counter configured<br \/> as a timer. The current count value can be read from the counter register, and the register can also be<br \/> written to or ?preloaded?.<br \/> Figure 4-1 Generic representation of a hardware timer module<br \/> If the frequency of the synchronous pulse train, f is known then the elapsed time, T may be<br \/> determined from number of counts, N recorded by the timer as follows,<br \/> N T<br \/> f ? ??<br \/> 4.3.2 PIC16F877A Timer0 module<br \/> The Timer0 module on the PIC16F877A MCU is an 8 bit pre-scalable timer\/counter. In timer mode, the<br \/> TMR0 special function register (SFR) is automatically incremented on every instruction clock cycle. In<br \/> counter mode, the TMR0 SFR is incremented either on rising or on falling edge (configuration<br \/> dependant) of the external pin RA4\/T0CKL. In this laboratory practical we will only be considering the<br \/> use of Timer0 in timer mode.<br \/> 33<br \/> The 8 bit Timer0 module on board the PIC16F877A can store 8 2 256 ? independent values from 0-<br \/> 255. The current count value is stored in the TMR0 SFR may be read at any time without affecting the<br \/> operation of the Timer0 module. It may also written to (preloaded) by writing the appropriate value<br \/> to the TMR0 SFR.<br \/> When the Timer0 module count value reaches its maximum value (255), the counter overflows back<br \/> to zero and continues counting. This timer overflow results in the setting of a bit (TMR0IF) in the<br \/> INTCON SFR. Figure 4-2 show the structure of the INTCON SFR which we will be looking at in more<br \/> detail in future laboratory practicals. For the moment just remember that when a Timer0 overflow<br \/> occurs then the TMR0IF bit is SET.<br \/> Figure 4-2 The INTCON register<br \/> A single bit which signifies an occurrence of an event, in this case a Timer0 overflow, is called a flag.<br \/> We can detect when the overflow Timer0 has occurred by regularly checking the status of the TMR0IF<br \/> bit (flag) in a process known as polling. By using polling in conjunction with loopsit is possible to create<br \/> accurate delays.<br \/> Timer0 receives its synchronous pulse train (clock) at the instruction cycle rate of the PIC16F877A<br \/> MCU, which is one quarter of the frequency of the quartz crystal oscillator used to clock the MCU. For<br \/> the 3.2768 MHz crystal oscillators used on the E-block development systems, this yields an instruction<br \/> cycle rate, CY f of<br \/> 6 3.2768 10 819.2 kHz<br \/> 4 CY f ? ? ?<br \/> The instruction cycle period, 1.221 ?s TCY ? ??is then simply the reciprocal of the instruction cycle rate,<br \/> CY f .<br \/> Along with the basic operation as a timer\/counter, the Timer0 module also has a prescaler associated<br \/> with it. A prescaler is a logical device that reduced the frequency of the incoming clock by integer<br \/> division. The prescaler may be set to divide down the incoming clock by a range of preconfigured ratios<br \/> from 1:2 to 1:256.??<br \/> For example, setting the Timer0 prescaler to 1:128 will increment the timer at a now-reduced rate of<br \/> \/128 6.4 kHz CY f ? . It is important that the prescaler is configured correctly so that the required<br \/> timings are obtained for the application in question.<br \/> 4.3.3 Timer0 module configuration overview<br \/> A schematic representation of the timer module is shown in figure 4-3 which shows the various<br \/> elements which need to be correctly configured including the programmable prescaler module and<br \/> two multiplexers, which select the clock source and enable the prescaler respectively.??<br \/> 34<br \/> Figure 4-3 Schematic of the Timer0 module (adapted from PIC16F877A MCU datasheet)<br \/> The Timer0 module is configured using the OPTION_REG SFR which contains configuration bits to set<br \/> the clock source, prescaler value etc. Figure 4-4 shows the location of the configuring bits in the<br \/> OPTION_REG SFR. Note carefully at how the bit names relate to the schematic elements in figure 4-3.<br \/> Figure 4-4 The OPTION_REG SFR configuration bits (adapted from PIC16F877A datasheet)<br \/> Only bits 0 to 5 of the OPTION_REG SFR are needed to configure the Timer0 module, bits RBPU and<br \/> INTEDG are used other peripheral configuration purposes that we need not concern ourselves with<br \/> for the moment. In order to use the Timer0 module as in timer mode the properties of the relevant<br \/> configuration bits must be set up as shown in Table 4-1.<br \/> Table 4-1 Correct OPTION_REG configuration of using Timer0 in timer mode<br \/> Bit Name Bit location in<br \/> OPTION_REG<br \/> MPLAB XC8 syntax Configuration requirements<br \/> T0CS 5 INTCONbits.TOCS Set to 0 to use Timer0 in timer mode<br \/> T0SE 4 INTCONbits.TOSE No effect in timer mode (don?t care state)<br \/> PSA 3 INTCONbits.PSA Set to 0 in timer mode to utilise the prescaler<br \/> PS2:0 2:0 INTCONbits.PS Define as required by application<br \/> The divide down value of the prescaler is selected by setting the three bits, PS2:0 according to table<br \/> 4-2, 8 discrete options are available.??<br \/> 35<br \/> Table 4-2 Timer0 prescaler configuration<br \/> PS2, PS1, PS0 Value TMR0 Rate<br \/> 000 0 1:2<br \/> 001 1 1:4<br \/> 010 2 1:8<br \/> 011 3 1:16<br \/> 100 4 1:32<br \/> 101 5 1:64<br \/> 110 6 1:128<br \/> 111 7 1:256<br \/> Note that a number of related bits in a SFR (in this case PS2:0) are termed a ?bit field?.<br \/> To summarise, the bitwise configuration of the OPTION_REG SFR (see figure 4-4) for operation of timer<br \/> 0 in timer mode may be considered as follows:<br \/> OPTION_REG = XX0X 0UUU<br \/> where X = a don?t care state and U = a user defined state.<br \/> 4.3.4 Calculation of timer counts and intervals<br \/> The prescaler and instruction clock rate are crucial parameters in determining\/creating delays using<br \/> the Timer0 module. The total delay created by a given number of Timer0 counts is<br \/> 4 prescaler 0count delay<br \/> osc<br \/> TMR<br \/> f<br \/> ? ? ? ??<br \/> where OSC f is the frequency of the quartz crystal used to clock the PIC16F877A. This formula takes<br \/> into account the prescaler ratio and the fact that the instruction clock rate is a quarter of the crystal<br \/> frequency (see section 4.3.2). Rearranging the above equation in order to determine the number of<br \/> TMR0 counts to create a specific delay yields,<br \/> delay 0count<br \/> 4 prescaler<br \/> osc f TMR<br \/> ? ? ? ??<br \/> Remember that the maximum number of countsthe 8 bit Timer0 module can store before overflowing<br \/> is 256.<br \/> For example, if a 10 ms delay is required, with the prescaler divide down ratio set to 1:256, then the<br \/> required number of TMR0 counts is as follows.<br \/> 3 6 delay 10 10 3.2768 10 0count 32<br \/> 4 prescaler 4 256<br \/> osc f TMR<br \/> ? ? ?? ? ?? ? ? ? ??<br \/> When 32 counts of the Timer0 module have occurred, we know that 10 ms have elapsed. We can use<br \/> this information to design a delay loops.<br \/> 36<br \/> 4.3.5 Timer0 configuration procedure<br \/> With the information shown in the previous section it is possible to derive a configuration procedure<br \/> for Timer0 as follows:<br \/> ? Set TOCS = 0 to enable timer mode<br \/> ? If using the prescaler, set PSA = 0. If not set PSA = 1 and skip the next step.<br \/> ? Calculate required prescaler divide down ratio and write the appropriate 3 bit value to the<br \/> PS bit field.<br \/> 4.4 Procedure<br \/> 4.4.1 Exercise 1 ? Creating a simple delay using the Timer0 module<br \/> Create a new project in the MPLAB X IDE, create an empty source file, and populate it with<br \/> the following code listing.<br \/> \/\/ Filename: Lab4Ex1.c<br \/> \/\/ Version: 1.0<br \/> \/\/ Date:? ?<br \/>\n <insert current=\"\" date=\"\"><br \/>\n  <br \/> \/\/ Author:<br \/>\n  <insert your=\"\" name=\"\"><br \/>\n   <br \/> \/\/<br \/>\n   <br \/> \/\/ Description: Simple demonstration of a timer delay??<br \/>\n   <br \/> #include<br \/>\n   <xc.h><br \/>\n    ?????????????\/\/ Required for all MPLAB XC8 source files<br \/>\n    <br \/> void main(void)<br \/>\n    <br \/> {<br \/>\n    <br \/> ????unsigned char preload = 0x00;??\/\/ TMR0 preload variable<br \/>\n    <br \/> ????\/\/ PORTD setup<br \/>\n    <br \/> ????TRISD = 0x00;???????????????\/\/ Set PORTD all outputs<br \/>\n    <br \/> ????PORTD = 0x00;???????????????\/\/ Clear PORTD<br \/>\n    <br \/> ????<br \/>\n    <br \/> ????\/\/Timer0 setup<br \/>\n    <br \/> ????OPTION_REGbits.T0CS = 0;????\/\/ Set clock source to internal (timer mode)<br \/>\n    <br \/> ????OPTION_REGbits.PSA = 0;?????\/\/ Set prescaler to Timer 0<br \/>\n    <br \/> ????OPTION_REGbits.PS = 7;??????\/\/ Set prescaler bit field to 111 for 1:256<br \/>\n    <br \/> ?????<br \/>\n    <br \/> ????while(1)????????????????????????\/\/ Infinite loop<br \/>\n    <br \/> ????{????????????????????????<br \/>\n    <br \/> ????????TMR0 = preload;?????????????\/\/ Preload timer0<br \/>\n    <br \/> ????????while(!INTCONbits.TMR0IF);????\/\/ Delay loop: Wait until TMR0 overflows<br \/>\n    <br \/> ????????INTCONbits.TMR0IF = 0;????????\/\/ Reset overflow flag, TMR0IF<br \/>\n    <br \/> ????????PORTD++;????????????????????\/\/ Increment PORTD<br \/>\n    <br \/> ????}<br \/>\n    <br \/> }<br \/>\n    <br \/> Build the project and upload the HEX file onto the PIC16F877A MCU.<br \/>\n    <br \/> Study the code listing carefully and observe what is happening to the LEDs on PORTD. You<br \/>\n    <br \/> should see PORTD incrementing from 0 to 255 in binary. Sketch a flow chart in your logbook<br \/>\n    <br \/> describing the sequence of events occurring in the executing code.<br \/>\n    <br \/> Calculate the length of the implemented delay using the appropriate formulae from section<br \/>\n    <br \/> 4.3.4. Keep in mind that TMR0 is preloaded with 0x00 and the delay loop repeats until TMR0<br \/>\n    <br \/> 37<br \/>\n    <br \/> overflows from 0xFF to 0x00 i.e. the loop condition becomes FALSE. In the general case for<br \/>\n    <br \/> the code listing above:<br \/>\n    <br \/> TMR0count 256 preload ? ? ??<br \/>\n    <br \/> Using a stopwatch, time how long it takes for the LEDs on PORTD to count up to 256 i.e. turn<br \/>\n    <br \/> from all OFF to all ON. Calculate the delay time for one individual count by dividing the total<br \/>\n    <br \/> time by 256.<br \/>\n    <br \/> Compare you calculated result from the empirical result obtained using a stopwatch. Does it<br \/>\n    <br \/> agree, taking into account any possible experimental error?<br \/>\n    <br \/> What happens if you increase the value of the preload variable in the code listing above?<br \/>\n    <br \/> 4.4.2 Exercise 2 ? Creating longer delays<br \/>\n    <br \/> In the previous exercise you created the longest possible delay using Timer0 i.e. with the prescaler set<br \/>\n    <br \/> to a maximum divide down ratio of 1:256, and the full count of TMR0 used i.e. from zero (0x00) until<br \/>\n    <br \/> it overflowed. However, there are many occasions when a longer delay than is possible using a single<br \/>\n    <br \/> timer overflow is required. One possible approach to this is to cascade several shorter delays, in a<br \/>\n    <br \/> loop, to create a longer overall delay.<br \/>\n    <br \/> Create a new project in the MPLAB X IDE, add an empty source file and add the following<br \/>\n    <br \/> code listing to it.<br \/>\n    <br \/> \/\/ Filename: Lab4Ex2.c<br \/>\n    <br \/> \/\/ Version: 1.0<br \/>\n    <br \/> \/\/ Date:? ?<br \/>\n    <insert current=\"\" date=\"\"><br \/>\n     <br \/> \/\/ Author:<br \/>\n     <insert your=\"\" name=\"\"><br \/>\n      <br \/> \/\/<br \/>\n      <br \/> \/\/ Description: Looping of a short timer delay to create a longer one??<br \/>\n      <br \/> #include<br \/>\n      <xc.h><br \/>\n       ?????????????\/\/ Required for all MPLAB XC8 source files<br \/>\n       <br \/> void main(void)<br \/>\n       <br \/> {<br \/>\n       <br \/> ????unsigned char preload = 192;????\/\/ TMR0 preload variable<br \/>\n       <br \/> ????unsigned char i;????????????????\/\/ Loop index variable<br \/>\n       <br \/> ????\/\/ PORTD setup<br \/>\n       <br \/> ????TRISD = 0x00;???????????????\/\/ Set PORTD all outputs<br \/>\n       <br \/> ????PORTD = 0x00;???????????????\/\/ Clear PORTD<br \/>\n       <br \/> ????<br \/>\n       <br \/> ????\/\/Timer0 setup<br \/>\n       <br \/> ????OPTION_REGbits.T0CS = 0;????\/\/ Set clock source to internal (timer mode)<br \/>\n       <br \/> ????OPTION_REGbits.PSA = 0;?????\/\/ Set prescaler to Timer 0<br \/>\n       <br \/> TIP!<br \/>\n       <br \/> When a Timer0 overflow occurs and the TMR0IF bit is SET and remains in that state until it is<br \/>\n       <br \/> manually RESET in software. This can be done using the following syntax:<br \/>\n       <br \/> INTCONbits.TMR0IF = 0;<br \/>\n       <br \/> It is important to remember to do this when you are polling for timer overflows.<br \/>\n       <br \/> 38<br \/>\n       <br \/> ????OPTION_REGbits.PS = 7;??????\/\/ Set prescaler bits to 111 for 1:256<br \/>\n       <br \/> ?????<br \/>\n       <br \/> ????while(1)????????????????????\/\/ Infinite loop<br \/>\n       <br \/> ????{????????????????????????<br \/>\n       <br \/> ????????for(i=0;i&lt;8;i++)???????\/\/ Loop to cascade several short delays together<br \/>\n       <br \/> ????????{<br \/>\n       <br \/> ????????????TMR0 = preload;?????????????\/\/ Preload timer0<br \/>\n       <br \/> ????????????while(!INTCONbits.TMR0IF);????\/\/ Delay loop: Wait until TMR0 overflows<br \/>\n       <br \/> ????????????INTCONbits.TMR0IF = 0;????????\/\/ Reset overflow flag, TMR0IF<br \/>\n       <br \/> ????????}<br \/>\n       <br \/> ????????PORTD++;???????????????\/\/ Increment PORTD<br \/>\n       <br \/> ????}<br \/>\n       <br \/> }<br \/>\n       <br \/> Calculate the length of the delay implemented using bearing in mind that the value of the<br \/>\n       <br \/> preload variable is now set to 192 and the shorter delay loop is now repeated 8 times.<br \/>\n       <br \/> Using a stopwatch, time how long it takes for the LEDs on PORTD to count up to 256 i.e. turn<br \/>\n       <br \/> from all OFF to all ON. Calculate the delay time for one individual count by dividing the total<br \/>\n       <br \/> time by 256.<br \/>\n       <br \/> Compare you calculated result from the empirical result obtained using a stopwatch. Does it<br \/>\n       <br \/> agree, taking into account any possible experimental error?<br \/>\n       <br \/> Modify the code to create a one second delay. You should approach this by adjusting the<br \/>\n       <br \/> preload value so that the short delay loop has a length that divides exactly into one second.<br \/>\n       <br \/> This short delay should then be repeated the required number of times to produce a one<br \/>\n       <br \/> second delay.<br \/>\n       <br \/> Confirm your results using a stopwatch.<br \/>\n       <br \/> 4.4.3 Exercise 3 ? Creating a one second delay function<br \/>\n       <br \/> A delay is a useful and often used action in any embedded system. Having gone to the effort of<br \/>\n       <br \/> developing a one second delay it would make sense to package the code into a function so that it could<br \/>\n       <br \/> be easily reused whenever required.???<br \/>\n       <br \/> The following code listing shows one possible template for implementing the one second delay as a<br \/>\n       <br \/> function call one_sec_delay(). The operation of this code is exactly the same as that produced in<br \/>\n       <br \/> exercise 3, the only difference is that all the code that had previously been required to create the<br \/>\n       <br \/> delay has now been packaged inside a function which is called from the main() function.<br \/>\n       <br \/> Create a project and enter the following listing. You will need to replace the two ???? symbols<br \/>\n       <br \/> in the listing below with the values you derived in the previous exercise in order for it to build<br \/>\n       <br \/> successfully.<br \/>\n       <br \/> \/\/ Filename: Lab4Ex3.c<br \/>\n       <br \/> \/\/ Version: 1.0<br \/>\n       <br \/> \/\/ Date:? ?<br \/>\n       <insert current=\"\" date=\"\"><br \/>\n        <br \/> \/\/ Author:<br \/>\n        <insert your=\"\" name=\"\"><br \/>\n         <br \/> \/\/<br \/>\n         <br \/> \/\/ Description: Implementing a Timer0 delay function??<br \/>\n         <br \/> #include<br \/>\n         <xc.h><br \/>\n          ?????????????\/\/ Required for all MPLAB XC8 source files<br \/>\n          <br \/> 39<br \/>\n          <br \/> void one_sec_delay (void);??\/\/ Function prototype<br \/>\n          <br \/> void main(void)<br \/>\n          <br \/> {<br \/>\n          <br \/> ????\/\/ PORTD setup<br \/>\n          <br \/> ????TRISD = 0x00;???????????????\/\/ Set PORTD all outputs<br \/>\n          <br \/> ????PORTD = 0x00;???????????????\/\/ Clear PORTD<br \/>\n          <br \/> ?????<br \/>\n          <br \/> ????while(1)????????????????????\/\/ Infinite loop<br \/>\n          <br \/> ????{????<br \/>\n          <br \/> ????????one_sec_delay();????????\/\/ Call delay function<br \/>\n          <br \/> ????????PORTD++;????????????????\/\/ Increment PORTD?????<br \/>\n          <br \/> ????}<br \/>\n          <br \/> }<br \/>\n          <br \/> void one_sec_delay (void)<br \/>\n          <br \/> {<br \/>\n          <br \/> ????unsigned char preload = ??;?????\/\/ TMR0 preload variable (derived from Ex2)<br \/>\n          <br \/> ????unsigned char i;????????????????\/\/ Loop index variable<br \/>\n          <br \/> ?????<br \/>\n          <br \/> ????\/\/Timer0 setup<br \/>\n          <br \/> ????OPTION_REGbits.T0CS = 0;????\/\/ Set clock source to internal (timer mode)<br \/>\n          <br \/> ????OPTION_REGbits.PSA = 0;?????\/\/ Set prescaler to Timer 0<br \/>\n          <br \/> ????OPTION_REGbits.PS = 7;??????\/\/ Set prescaler bits to 111 for 1:256<br \/>\n          <br \/> ?????<br \/>\n          <br \/> ????for(i=0;i<br \/>\n          <!--??;i++)???????\/\/ Loop to cascade several short delays together<br \/--> ????????????????????????????\/\/ Number of loops derived from Ex2<br \/>\n          <br \/> ????{<br \/>\n          <br \/> ????????TMR0 = preload;?????????????\/\/ Preload timer0<br \/>\n          <br \/> ????????while(!INTCONbits.TMR0IF);????\/\/ Delay loop: Wait until TMR0 overflows<br \/>\n          <br \/> ????????INTCONbits.TMR0IF = 0;????????\/\/ Reset overflow flag, TMR0IF<br \/>\n          <br \/> ????}?????<br \/>\n          <br \/> }<br \/>\n          <br \/> Build the project and validate that the operation is as anticipated.<br \/>\n          <br \/> 4.4.4 Exercise 4 ? Creating a variable delay function<br \/>\n          <br \/> In this exercise we will develop a generic variable delay function that will allow the implementation of<br \/>\n          <br \/> any user defined delay of an integer number of seconds<br \/>\n          <br \/> Create a new project based upon the code developed in exercise 3.<br \/>\n          <br \/> Modify the fixed one second delay function, one_sec_delay() developed in exercise 3 so that<br \/>\n          <br \/> it becomes a generic delay function taking the form,<br \/>\n          <br \/> void delay(unsigned char delay_length)<br \/>\n          <br \/> where the parameter delay_length sets the length of the delay implemented by the function.<br \/>\n          <br \/> The parameter will need to modify the number of cascaded short delays to generate the<br \/>\n          <br \/> variable delay.<br \/>\n          <br \/> 4.5 Further reading<br \/>\n          <br \/> Microchip MPLAB X Timer0 (Part 1) tutorial sheet. Note the code listings show is not directly<br \/>\n          <br \/> compatible with the XC8 compiler, but the information about configuration is still relevant.<br \/>\n         <\/xc.h><br \/>\n        <\/insert><br \/>\n       <\/insert><br \/>\n      <\/xc.h><br \/>\n     <\/insert><br \/>\n    <\/insert><br \/>\n   <\/xc.h><br \/>\n  <\/insert><br \/>\n <\/insert><\/p>\n<p> 32<br \/> 4 Lab 4 ? Timer0 module<br \/> 4.1 Aim<br \/> This laboratory practical will introduce you to the Timer0 module which is one of three timer\/counter<br \/> peripherals located on the PIC16F877A MCU. Timer\/counter modules allow the creation of precise<br \/> and deterministic timing intervals which is essential in many applications e.g. frequency<br \/> generation\/measurement, timekeeping, control systems, communications.??This laboratory practical<br \/> will focus on the proper configuration and usage of the Timer0 module in timer mode only.<br \/> 4.2 Learning Outcomes<br \/> ? Understand the structure of the Timer0 module on the PIC16F877A<br \/> ? Be able to configure the Timer0 module using the appropriate special function registers<br \/> ? Be able to develop projects to utilise the Timer0 module in a range of applications.<br \/> 4.3 Background<br \/> 4.3.1 Counter\/Timers<br \/> The only practical difference between a counter and a timer is the nature of the source. A counter<br \/> simply increments a stored ?count? value when a logic state change (either a rising or falling edge) is<br \/> received at its input. To operate a counter as a timer, a synchronous pulse train (clock) of a known<br \/> frequency is applied to the input. Figure 4-1 shows a generic representation of a counter configured<br \/> as a timer. The current count value can be read from the counter register, and the register can also be<br \/> written to or ?preloaded?.<br \/> Figure 4-1 Generic representation of a hardware timer module<br \/> If the frequency of the synchronous pulse train, f is known then the elapsed time, T may be<br \/> determined from number of counts, N recorded by the timer as follows,<br \/> N T<br \/> f ? ??<br \/> 4.3.2 PIC16F877A Timer0 module<br \/> The Timer0 module on the PIC16F877A MCU is an 8 bit pre-scalable timer\/counter. In timer mode, the<br \/> TMR0 special function register (SFR) is automatically incremented on every instruction clock cycle. In<br \/> counter mode, the TMR0 SFR is incremented either on rising or on falling edge (configuration<br \/> dependant) of the external pin RA4\/T0CKL. In this laboratory practical we will only be considering the<br \/> use of Timer0 in timer mode.<br \/> 33<br \/> The 8 bit Timer0 module on board the PIC16F877A can store 8 2 256 ? independent values from 0-<br \/> 255. The current count value is stored in the TMR0 SFR may be read at any time without affecting the<br \/> operation of the Timer0 module. It may also written to (preloaded) by writing the appropriate value<br \/> to the TMR0 SFR.<br \/> When the Timer0 module count value reaches its maximum value (255), the counter overflows back<br \/> to zero and continues counting. This timer overflow results in the setting of a bit (TMR0IF) in the<br \/> INTCON SFR. Figure 4-2 show the structure of the INTCON SFR which we will be looking at in more<br \/> detail in future laboratory practicals. For the moment just remember that when a Timer0 overflow<br \/> occurs then the TMR0IF bit is SET.<br \/> Figure 4-2 The INTCON register<br \/> A single bit which signifies an occurrence of an event, in this case a Timer0 overflow, is called a flag.<br \/> We can detect when the overflow Timer0 has occurred by regularly checking the status of the TMR0IF<br \/> bit (flag) in a process known as polling. By using polling in conjunction with loopsit is possible to create<br \/> accurate delays.<br \/> Timer0 receives its synchronous pulse train (clock) at the instruction cycle rate of the PIC16F877A<br \/> MCU, which is one quarter of the frequency of the quartz crystal oscillator used to clock the MCU. For<br \/> the 3.2768 MHz crystal oscillators used on the E-block development systems, this yields an instruction<br \/> cycle rate, CY f of<br \/> 6 3.2768 10 819.2 kHz<br \/> 4 CY f ? ? ?<br \/> The instruction cycle period, 1.221 ?s TCY ? ??is then simply the reciprocal of the instruction cycle rate,<br \/> CY f .<br \/> Along with the basic operation as a timer\/counter, the Timer0 module also has a prescaler associated<br \/> with it. A prescaler is a logical device that reduced the frequency of the incoming clock by integer<br \/> division. The prescaler may be set to divide down the incoming clock by a range of preconfigured ratios<br \/> from 1:2 to 1:256.??<br \/> For example, setting the Timer0 prescaler to 1:128 will increment the timer at a now-reduced rate of<br \/> \/128 6.4 kHz CY f ? . It is important that the prescaler is configured correctly so that the required<br \/> timings are obtained for the application in question.<br \/> 4.3.3 Timer0 module configuration overview<br \/> A schematic representation of the timer module is shown in figure 4-3 which shows the various<br \/> elements which need to be correctly configured including the programmable prescaler module and<br \/> two multiplexers, which select the clock source and enable the prescaler respectively.??<br \/> 34<br \/> Figure 4-3 Schematic of the Timer0 module (adapted from PIC16F877A MCU datasheet)<br \/> The Timer0 module is configured using the OPTION_REG SFR which contains configuration bits to set<br \/> the clock source, prescaler value etc. Figure 4-4 shows the location of the configuring bits in the<br \/> OPTION_REG SFR. Note carefully at how the bit names relate to the schematic elements in figure 4-3.<br \/> Figure 4-4 The OPTION_REG SFR configuration bits (adapted from PIC16F877A datasheet)<br \/> Only bits 0 to 5 of the OPTION_REG SFR are needed to configure the Timer0 module, bits RBPU and<br \/> INTEDG are used other peripheral configuration purposes that we need not concern ourselves with<br \/> for the moment. In order to use the Timer0 module as in timer mode the properties of the relevant<br \/> configuration bits must be set up as shown in Table 4-1.<br \/> Table 4-1 Correct OPTION_REG configuration of using Timer0 in timer mode<br \/> Bit Name Bit location in<br \/> OPTION_REG<br \/> MPLAB XC8 syntax Configuration requirements<br \/> T0CS 5 INTCONbits.TOCS Set to 0 to use Timer0 in timer mode<br \/> T0SE 4 INTCONbits.TOSE No effect in timer mode (don?t care state)<br \/> PSA 3 INTCONbits.PSA Set to 0 in timer mode to utilise the prescaler<br \/> PS2:0 2:0 INTCONbits.PS Define as required by application<br \/> The divide down value of the prescaler is selected by setting the three bits, PS2:0 according to table<br \/> 4-2, 8 discrete options are available.??<br \/> 35<br \/> Table 4-2 Timer0 prescaler configuration<br \/> PS2, PS1, PS0 Value TMR0 Rate<br \/> 000 0 1:2<br \/> 001 1 1:4<br \/> 010 2 1:8<br \/> 011 3 1:16<br \/> 100 4 1:32<br \/> 101 5 1:64<br \/> 110 6 1:128<br \/> 111 7 1:256<br \/> Note that a number of related bits in a SFR (in this case PS2:0) are termed a ?bit field?.<br \/> To summarise, the bitwise configuration of the OPTION_REG SFR (see figure 4-4) for operation of timer<br \/> 0 in timer mode may be considered as follows:<br \/> OPTION_REG = XX0X 0UUU<br \/> where X = a don?t care state and U = a user defined state.<br \/> 4.3.4 Calculation of timer counts and intervals<br \/> The prescaler and instruction clock rate are crucial parameters in determining\/creating delays using<br \/> the Timer0 module. The total delay created by a given number of Timer0 counts is<br \/> 4 prescaler 0count delay<br \/> osc<br \/> TMR<br \/> f<br \/> ? ? ? ??<br \/> where OSC f is the frequency of the quartz crystal used to clock the PIC16F877A. This formula takes<br \/> into account the prescaler ratio and the fact that the instruction clock rate is a quarter of the crystal<br \/> frequency (see section 4.3.2). Rearranging the above equation in order to determine the number of<br \/> TMR0 counts to create a specific delay yields,<br \/> delay 0count<br \/> 4 prescaler<br \/> osc f TMR<br \/> ? ? ? ??<br \/> Remember that the maximum number of countsthe 8 bit Timer0 module can store before overflowing<br \/> is 256.<br \/> For example, if a 10 ms delay is required, with the prescaler divide down ratio set to 1:256, then the<br \/> required number of TMR0 counts is as follows.<br \/> 3 6 delay 10 10 3.2768 10 0count 32<br \/> 4 prescaler 4 256<br \/> osc f TMR<br \/> ? ? ?? ? ?? ? ? ? ??<br \/> When 32 counts of the Timer0 module have occurred, we know that 10 ms have elapsed. We can use<br \/> this information to design a delay loops.<br \/> 36<br \/> 4.3.5 Timer0 configuration procedure<br \/> With the information shown in the previous section it is possible to derive a configuration procedure<br \/> for Timer0 as follows:<br \/> ? Set TOCS = 0 to enable timer mode<br \/> ? If using the prescaler, set PSA = 0. If not set PSA = 1 and skip the next step.<br \/> ? Calculate required prescaler divide down ratio and write the appropriate 3 bit value to the<br \/> PS bit field.<br \/> 4.4 Procedure<br \/> 4.4.1 Exercise 1 ? Creating a simple delay using the Timer0 module<br \/> Create a new project in the MPLAB X IDE, create an empty source file, and populate it with<br \/> the following code listing.<br \/> \/\/ Filename: Lab4Ex1.c<br \/> \/\/ Version: 1.0<br \/> \/\/ Date:? ?<br \/>\n <insert current=\"\" date=\"\"><br \/>\n  <br \/> \/\/ Author:<br \/>\n  <insert your=\"\" name=\"\"><br \/>\n   <br \/> \/\/<br \/>\n   <br \/> \/\/ Description: Simple demonstration of a timer delay??<br \/>\n   <br \/> #include<br \/>\n   <xc.h><br \/>\n    ?????????????\/\/ Required for all MPLAB XC8 source files<br \/>\n    <br \/> void main(void)<br \/>\n    <br \/> {<br \/>\n    <br \/> ????unsigned char preload = 0x00;??\/\/ TMR0 preload variable<br \/>\n    <br \/> ????\/\/ PORTD setup<br \/>\n    <br \/> ????TRISD = 0x00;???????????????\/\/ Set PORTD all outputs<br \/>\n    <br \/> ????PORTD = 0x00;???????????????\/\/ Clear PORTD<br \/>\n    <br \/> ????<br \/>\n    <br \/> ????\/\/Timer0 setup<br \/>\n    <br \/> ????OPTION_<\/p>\n","protected":false},"excerpt":{"rendered":"<p>Joon, age 51, is an unmarried, cash basis, calendar year taxpayer. Joon has one 9-year-old qualifying child who lives with him full-time and is claimed on Form 1040. Joon has the following income and deductions for 2016: RECEIPTS FOR YEAR\/Deductions <a href=\"https:\/\/www.benedictsol.com\/blogs\/the-market-reaction-to-corporate-governance-regulation\/\" class=\"read-more\">Read More &#8230;<\/a><\/p>\n","protected":false},"author":1,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[],"tags":[],"class_list":["post-136312","post","type-post","status-publish","format-standard","hentry"],"_links":{"self":[{"href":"https:\/\/www.benedictsol.com\/blogs\/wp-json\/wp\/v2\/posts\/136312","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/www.benedictsol.com\/blogs\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/www.benedictsol.com\/blogs\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/www.benedictsol.com\/blogs\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/www.benedictsol.com\/blogs\/wp-json\/wp\/v2\/comments?post=136312"}],"version-history":[{"count":0,"href":"https:\/\/www.benedictsol.com\/blogs\/wp-json\/wp\/v2\/posts\/136312\/revisions"}],"wp:attachment":[{"href":"https:\/\/www.benedictsol.com\/blogs\/wp-json\/wp\/v2\/media?parent=136312"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/www.benedictsol.com\/blogs\/wp-json\/wp\/v2\/categories?post=136312"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/www.benedictsol.com\/blogs\/wp-json\/wp\/v2\/tags?post=136312"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}